One of the main reasons here is minimizing the number of (FPGA) cycles it takes you from reading the first byte of the incoming UDP packet to writing the first (or last; depending on exchange gateways configuration) byte of the order that contains your reaction to the market data. If you're also doing computations "inline" (as opposed to what the author described in the article), it's even more complicated since you now have to build the books and calculate various things before committing to a decision. This may affect the general design of the strategy / execution strategy, so quants/engineers involved are often assumed to have the knowledge of how things work, down to the cycle level.