It’s a scientific code which manipulates a lot of relatively big matrices, which saturates the FPUs pretty well (I made the analysis back then).

Intel’s memory architecture can keep up with the load until I utilize all cores. When I start to use HT cores, neither cache, nor memory can keep up.

I do the both tests (Intel and Apple) both with physical core counts to keep it fair.

So it’s not some run of the mill code.